This invention relates generally to single port memory device, and more particularly, to write and read collision avoidance system in single port memory device.
Single port memory devices may allow only one write or read operation at a time. Examples, of single port memory devices may include static random access memory (SRAM), dynamic random access memory (DRAMs), or the like. SRAM is a volatile memory where any data stored is erased when the power supply to the SRAM is turned off. An SRAM cell is often made up of six transistors. Four transistors make up a cross-coupled latch that either stores a logical one or a logical zero. The other two transistors are used for accessing the SRAM cell during read and write operations. Access speed for SRAM is fast compared to certain other memories and so therefore is often used as cache memory and for buffers. Single port memory devices such as SRAM are often used as buffers between two asynchronous circuits.